Hardware set upThe demo uses the LEDs that are soldered directly onto the Hitex PCB, so no hardware set up is required.
Building and executing the demo application
RTOS Configuration and Usage Details
Cortex-M4F FreeRTOS port specific configurationConfiguration items specific to this demo are contained in FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h. The constants defined in this file can be edited to suit your application. In particular -
Attention please!: See the page dedicated to setting interrupt priorities on ARM Cortex-M devices. Remember that ARM Cortex-M cores use numerically low priority numbers to represent HIGH priority interrupts. This can seem counter-intuitive and is easy to forget! If you wish to assign an interrupt a low priority do NOT assign it a priority of 0 (or other low numeric value) as this will result in the interrupt actually having the highest priority in the system - and therefore potentially make your system crash if this priority is above configMAX_SYSCALL_INTERRUPT_PRIORITY. Also, do not leave interrupt priorities unassigned, as by default they will have a priority of 0 and therefore the highest priority possible. The lowest priority on a ARM Cortex-M core is in fact 255 - however different Cortex-M vendors implement a different number of priority bits and supply library functions that expect priorities to be specified in different ways. For example, on LPC ARM Cortex-M microcontrollers, the lowest priority you can specify is in fact 31 - this is defined by the constant configLIBRARY_LOWEST_INTERRUPT_PRIORITY in FreeRTOSConfig.h. The highest priority that can be assigned is always zero. It is also recommended to ensure that all five priority bits are assigned as being preemption priority bits, and none as sub priority bits, as they are in the provided demo. Each port #defines 'BaseType_t' to equal the most efficient data type for that processor. This port defines BaseType_t to be of type long.
Core clock configurationThe demo runs the LPC4350 clock at 204MHz. To achieve this it is necessary for the functions that configure the parallel flash memory controller to execute out of RAM. The mapping of these functions is performed within the linker script itself (scatter file), and the code that steps the core clock up to 204MHz is contained in Hitex_fast_startup.c.Interrupt service routinesUnlike most ports, interrupt service routines that cause a context switch have no special requirements, and can be written as per the compiler documentation. The macro portEND_SWITCHING_ISR() can be used to request a context switch from within an interrupt service routine.Note that portEND_SWITCHING_ISR() will leave interrupts enabled. The following source code snippet is provided as an example. The interrupt uses a semaphore to synchronise with a task (not shown), and calls portEND_SWITCHING_ISR to ensure the interrupt returns directly to the task. void Dummy_IRQHandler(void) { long lHigherPriorityTaskWoken = pdFALSE; /* Clear the interrupt if necessary. */ Dummy_ClearITPendingBit(); /* This interrupt does nothing more than demonstrate how to synchronise a task with an interrupt. A semaphore is used for this purpose. Note lHigherPriorityTaskWoken is initialised to zero. */ xSemaphoreGiveFromISR( xTestSemaphore, &lHigherPriorityTaskWoken ); /* If there was a task that was blocked on the semaphore, and giving the semaphore caused the task to unblock, and the unblocked task has a priority higher than the current Running state task (the task that this interrupt interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE internally within xSemaphoreGiveFromISR(). Passing pdTRUE into the portEND_SWITCHING_ISR() macro will result in a context switch being pended to ensure this interrupt returns directly to the unblocked, higher priority, task. Passing pdFALSE into portEND_SWITCHING_ISR() has no effect. */ portEND_SWITCHING_ISR( lHigherPriorityTaskWoken ); } Only FreeRTOS API functions that end in "FromISR" can be called from an interrupt service routine - and then only if the priority of the interrupt is less than or equal to that set by the configMAX_SYSCALL_INTERRUPT_PRIORITY configuration constant.
Resources used by FreeRTOSFreeRTOS requires exclusive use of the SysTick and PendSV interrupts. SVC number #0 is also used.Switching between the pre-emptive and co-operative RTOS kernelsSet the definition configUSE_PREEMPTION within RTOSDemo/FreeRTOSConfig.h to 1 to use pre-emption or 0 to use co-operative. The full demo application may not execute correctly when the co-operative RTOS scheduler is selected.Compiler optionsAs with all the ports, it is essential that the correct compiler options are used. The best way to ensure this is to base your application on the provided demo application files.Memory allocationSource/Portable/MemMang/heap_2.c is included in the ARM Cortex-M4F demo application project to provide the memory allocation required by the RTOS kernel. Please refer to the Memory Management section of the API documentation for full information.MiscellaneousNote that vPortEndScheduler() has not been implemented.
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NXP tweet showing LPC5500 (ARMv8-M Cortex-M33) running FreeRTOS. Meet Richard Barry and learn about running FreeRTOS on RISC-V at FOSDEM 2019 Version 10.1.1 of the FreeRTOS kernel is available for immediate download. MIT licensed. View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS. Careers
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