The FreeRTOS kernel is now an MIT licensed AWS open source project, and these pages are being updated accordingly.

Quality RTOS & Embedded Software About   Contact   Support   FAQ   Download Menu      Quick Start Supported MCUs PDF Books Trace Tools Ecosystem Quick Start Guide Support Forum ⇓ Download Source ⇓ FreeRTOS+ Ecosystem  FreeRTOS+TCP:  Thread safe TCP/IP stack  SafeRTOS:  TUV certified RTOS  OpenRTOS:  Commercial Licensed RTOS  Fail Safe File System:  Ensures data integrity  FreeRTOS BSPs:  3rd party driver packages  Trace & Visualisation:  Tracealyzer for FreeRTOS  CLI:  Command line interface  WolfSSL SSL / TLS:  Networking security protocols  RTOS Training:  Delivered online or on-site  IO:  read(), write(), ioctl() interface FreeRTOS+ Lab Projects  FreeRTOS+POSIX:  POSIX threading API  FreeRTOS+FAT:  Thread aware file system Hint: Use the tree menu to navigate groups of related pages   GCC Signal Attribute [RTOS Implementation Building Blocks] The GCC development tools allow interrupts to be written in C. A compare match event on the AVR timer 1 peripheral can be written using the following syntax. void SIG_OUTPUT_COMPARE1A( void ) __attribute__ ( ( signal ) ); void SIG_OUTPUT_COMPARE1A( void ) { /* ISR C code for RTOS tick. */ vPortYieldFromTick(); } The '__attribute__ ( ( signal ) )' directive on the function prototype informs the compiler that the function is an ISR and results in two important changes in the compiler output. The 'signal' attribute ensures that every processor register that gets modified during the ISR is restored to its original value when the ISR exits. This is required as the compiler cannot make any assumptions as to when the interrupt will execute, and therefore cannot optimize which processor registers require saving and which don't. The 'signal' attribute also forces a 'return from interrupt' instruction (RETI) to be used in place of the 'return' instruction (RET) that would otherwise be used. The AVR microcontroller disables interrupts upon entering an ISR and the RETI instruction is required to re-enable them on exiting. Code output by the compiler: ;void SIG_OUTPUT_COMPARE1A( void ) ;{ ; --------------------------------------- ; CODE GENERATED BY THE COMPILER TO SAVE ; THE REGISTERS THAT GET ALTERED BY THE ; APPLICATION CODE DURING THE ISR. PUSH R1 PUSH R0 IN R0,0x3F PUSH R0 CLR R1 PUSH R18 PUSH R19 PUSH R20 PUSH R21 PUSH R22 PUSH R23 PUSH R24 PUSH R25 PUSH R26 PUSH R27 PUSH R30 PUSH R31 ; --------------------------------------- ; CODE GENERATED BY THE COMPILER FROM THE ; APPLICATION C CODE. ;vPortYieldFromTick(); CALL 0x0000029B ;Call subroutine ;} ; --------------------------------------- ; CODE GENERATED BY THE COMPILER TO ; RESTORE THE REGISTERS PREVIOUSLY ; SAVED. POP R31 POP R30 POP R27 POP R26 POP R25 POP R24 POP R23 POP R22 POP R21 POP R20 POP R19 POP R18 POP R0 OUT 0x3F,R0 POP R0 POP R1 RETI ; --------------------------------------- Next: RTOS Implementation - The GCC Naked Attribute [ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ] Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News NXP tweet showing LPC5500 (ARMv8-M Cortex-M33) running FreeRTOS. Meet Richard Barry and learn about running FreeRTOS on RISC-V at FOSDEM 2019 Version 10.1.1 of the FreeRTOS kernel is available for immediate download. MIT licensed. View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS. Careers FreeRTOS and other embedded software careers at AWS. FreeRTOS Partners